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| product description the AD598 is a complete, monolithic linear variable differen- tial transformer (lvdt) signal conditioning subsystem. it is used in conjunction with lvdts to convert transducer mechan- ical position to a unipolar or bipolar dc voltage with a high degree of accuracy and repeatability. all circuit functions are included on the chip. with the addition of a few external passive components to set frequency and gain, the AD598 converts the raw lvdt secondary output to a scaled dc signal. the device can also be used with rvdt transducers. the AD598 contains a low distortion sine wave oscillator to drive the lvdt primary. the lvdt secondary output consists of two sine waves that drive the AD598 directly. the AD598 operates upon the two signals, dividing their difference by their sum, producing a scaled unipolar or bipolar dc output. the AD598 uses a unique ratiometric architecture (patent pend- ing) to eliminate several of the disadvantages associated with traditional approaches to lvdt interfacing. the benefits of this new circuit are: no adjustments are necessary, transformer null voltage and primary to secondary phase shift does not affect sys- tem accuracy, temperature stability is improved, and transducer interchangeability is improved. the AD598 is available in two performance grades: grade temperature range package AD598jr 0 c to +70 c 20-pin small outline (soic) AD598ad C40 c to +85 c 20-pin ceramic dip it is also available processed to mil-std-883b, for the military range of C55 c to +125 c. functional block diagram osc amp amp v out lvdt excitation (carrier) 11 17 10 16 2 3 filter a? a+b v b v a AD598 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a lvdt signal conditioner AD598 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 product highlights 1. the AD598 offers a monolithic solution to lvdt and rvdt signal conditioning problems; few extra passive com- ponents are required to complete the conversion from me- chanical position to dc voltage and no adjustments are required. 2. the AD598 can be used with many different types of lvdts because the circuit accommodates a wide range of input and output voltages and frequencies; the AD598 can drive an lvdt primary with up to 24 v rms and accept sec- ondary input levels as low as 100 mv rms. 3. the 20 hz to 20 khz lvdt excitation frequency is deter- mined by a single external capacitor. the AD598 input sig- nal need not be synchronous with the lvdt primary drive. this means that an external primary excitation, such as the 400 hz power mains in aircraft, can be used. 4. the AD598 uses a ratiometric decoding scheme such that primary to secondary phase shifts and transducer null voltage have absolutely no effect on overall circuit performance. 5. multiple lvdts can be driven by a single AD598, either in series or parallel as long as power dissipation limits are not exceeded. the excitation output is thermally protected. 6. the AD598 may be used in telemetry applications or in hos- tile environments where the interface electronics may be re- mote from the lvdt. the AD598 can drive an lvdt at the end of 300 feet of cable, since the circuit is not affected by phase shifts or absolute signal magnitudes. the position output can drive as much as 1000 feet of cable. 7. the AD598 may be used as a loop integrator in the design of simple electromechanical servo loops. features single chip solution, contains internal oscillator and voltage reference no adjustments required insensitive to transducer null voltage insensitive to primary to secondary phase shifts dc output proportional to position 20 hz to 20 khz frequency range single or dual supply operation unipolar or bipolar output will operate a remote lvdt at up to 300 feet position output can drive up to 1000 feet of cable will also interface to an rvdt outstanding performance linearity: 0.05% of fs max output voltage: 6 11 v min gain drift: 50 ppm/ 8 c of fs max offset drift: 50 ppm/ 8 c of fs max
AD598Cspecifications (typical @ +25 8 c and 6 15 v dc, c1 = 0.015 m f, r2 = 80 k v , r l = 2 k v , unless otherwise noted. see figure 7.) rev. a C2C AD598j AD598a parameter min typ max min typ max unit transfer function 1 v out = v a v b v a + v b 500 m a r 2 v overall error 2 t min to t max 0.6 2.35 0.6 1.65 % of fs signal output characteristics output voltage range (t min to t max ) 6 11 6 11 v output current (t min to t max )86ma short circuit current 20 20 ma nonlinearity 3 (t min to t max )75 6 500 75 6 500 ppm of fs gain error 4 0.4 6 1 0.4 6 1 % of fs gain drift 20 6 100 20 6 50 ppm/ c of fs offset 5 0.3 6 1 0.3 6 1 % of fs offset drift 7 6 200 7 6 50 ppm/ c of fs excitation voltage rejection 6 100 100 ppm/db power supply rejection ( 12 v to 18 v) psrr gain (t min to t max ) 300 100 400 100 ppm/v psrr offset (t min to t max ) 100 15 200 15 ppm/v common-mode rejection ( 3 v) cmrr gain (t min to t max ) 100 25 200 25 ppm/v cmrr offset (t min to t max ) 100 6 200 6 ppm/v output ripple 7 4 4 mv rms excitation output characteristics (@ 2.5 khz) excitation voltage range 2.1 24 2.1 24 v rms excitation voltage (r1 = open) 8 1.2 2.1 1.2 2.1 v rms (r1 = 12.7 k w ) 8 2.6 4.1 2.6 4.1 v rms (r1 = 487 w ) 8 14 20 14 20 v rms excitation voltage tc 9 600 600 ppm/ c output current 30 30 ma rms t min to t max 12 12 ma rms short circuit current 60 60 ma dc offset voltage (differential, r1 = 12.7 k w ) t min to t max 30 6 100 30 6 100 mv frequency 20 20k 20 20k hz frequency tc, (r1 = 12.7 k w ) 200 200 ppm/ c total harmonic distortion C50 C50 db signal input characteristics signal voltage 0.1 3.5 0.1 3.5 v rms input impedance 200 200 k w input bias current (ain and bin) 1 5 1 5 m a signal reference bias current 2 10 2 10 m a excitation frequency 0 20 0 20 khz power supply requirements operating range 13 36 13 36 v dual supply operation ( 10 v output) 13 13 v single supply operation 0 to +10 v output 17.5 17.5 v 0 to C10 v output 17.5 17.5 v current (no load at signal and excitation outputs) 12 15 12 15 ma t min to t max 16 18 ma temperature range jr (soic) 0 +70 c ad (dip) C40 +85 c package option soic (r-20) AD598jr side brazed dip (d-20) AD598ad notes 1 v a and v b represent the mean average deviation (mad) of the detected sine waves. note that for this transfer function to linearly represent positive displacement, the sum of v a and v b of the lvdt must remain constant with stroke length. see theory of operation. also see figures 7 and 12 for r2. 2 from t min , to t max , the overall error due to the AD598 alone is determined by combining gain error, gain drift and offset drift. for example the worst case overall error for the AD598ad from t min to t max is calculated as follows: overall error = gain error at +25 c ( 1% full scale) + gain drift from C40 c to +25 c (50 ppm/ c of fs +65 c) + offset drift from C40 c to +25 c (50 ppm/ c of fs +65 c) = 1.65% of full scale. note that 1000 ppm of full scale equals 0.1% of full scale. full scale is defined as the voltage difference between the maximum positive and maximum negative output. 3 nonlinearity of the AD598 only, in units of ppm of full scale. nonlinearity is defined as the maximum measured deviation of the AD598 output voltage from a straight line. the straight line is determined by connecting the maximum prod uced full-scale negative voltage with the maximum produced full-scale positive voltage. 4 see transfer function. 5 this offset refers to the (v a Cv b )/(v a +v b ) input spanning a full-scale range of 1. [for (v a Cv b )/(v a +v b ) to equal +1, v b must equal zero volts; and correspondingly for (v a Cv b )/(v a +v b ) to equal C1, v a must equal zero volts. note that offset errors do not allow accurate use of zero magnitude inputs, practical inputs are limited to 100 mv rms.] the 1 span is a convenient reference point to define offset referred to input. for example, with this input span a value of r2 = 20 k w would give v out span a value of 10 volts. caution, most lvdts will typically exercise less of the ((v a Cv b ))/((v a +v b )) input span and thus require a larger value of r2 to produce the 10 v output span. in this case the offset is correspondingly magnified when referred to the output voltage. for example, a schaevitz e100 lvdt requires 80.2 k w for r2 to produce a 10.69 v output and (v a Cv b )/(v a +v b ) equals 0.27. this ratio may be determined from the graph shown in figure 18, (v a Cv b )/(v a +v b ) = (1.71 v rms C 0.99 v rms)/(1.71 v rms + 0.99 v rms). the maximum offset value referred to the 10.69 v output may be determined by multiplying the maximum value shown in the data sheet ( 1% of fs by 1/0.27 which equals 3.7% maximum. similarly, to determine the maximum values of offset drift, offset cmrr and offset psrr when referred to the 10.69 v output, these data sheet values should also be multiplied by (1/0.27). for this example for the AD598ad the maximum values of offset drift, psrr offset and cmrr offset would be: 185 ppm/ c of fs; 741 ppm/v and 741 ppm / v respectively when referred to the 10.69 v output. 6 for example, if the excitation to the primary changes by 1 db, the gain of the system will change by typically 100 ppm. 7 output ripple is a function of the AD598 bandwidth determined by c2, c3 and c4. see figures 16 and 17. 8 r1 is shown in figures 7 and 12. 9 excitation voltage drift is not an important specification because of the ratiometric operation of the AD598. specifications subject to change without notice. specifications shown in boldface are tested on all production units at final electrical test. results from those tested are used to calculate outgoing quality levels. all min and max specifications are guaranteed, although only those shown in boldface are tested on all production units. AD598 thermal characteristics q jc q ja soic package 22 c/w 80 c/w side brazed package 25 c/w 85 c/w absolute maximum ratings total supply voltage +v s to Cv s . . . . . . . . . . . . . . . . . +36 v storage temperature range r package . . . . . . . . . . . . . . . . . . . . . . . . . C65 c to +150 c d package . . . . . . . . . . . . . . . . . . . . . . . . . C65 c to +150 c operating temperature range AD598jr . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 c to +70 c AD598ad . . . . . . . . . . . . . . . . . . . . . . . . . . C40 c to +85 c lead temperature range (soldering 60 sec) . . . . . . . . +300 c power dissipation up to +65 c . . . . . . . . . . . . . . . . . . . 1.2 w derates above +65 c . . . . . . . . . . . . . . . . . . . . . . . 12 mw/ c ordering guide temperature package package model range description option AD598jr 0 c to +70 c soic r-20 AD598ad C40 c to +85c ceramic dip d-20 offset 1 offset 2 signal reference signal output feedback output filter a1 filter a2 filter exc 1 exc 2 level 1 level 2 freq 1 freq 2 b1 filter b2 filter 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 17 18 19 20 ? s +v s AD598 top view (not to scale) v b v a rev. a C3C AD598Ctypical characteristics (at +25 8 c and v s = 6 15 v, unless otherwise noted) theory of operation a block diagram of the AD598 along with an lvdt (linear variable differential transformer) connected to its input is shown in figure 5. the lvdt is an electromechanical trans- ducer whose input is the mechanical displacement of a core and whose output is a pair of ac voltages proportional to core posi- tion. the transducer consists of a primary winding energized by osc amp amp v out lvdt excitation (carrier) 11 17 10 16 2 3 filter a? a+b v b v a AD598 figure 5. AD598 functional block diagram an external sine wave reference source, two secondary windings connected in series, and the moveable core to couple flux be- tween the primary and secondary windings. the AD598 energizes the lvdt primary, senses the lvdt secondary output voltages and produces a dc output voltage proportional to core position. the AD598 consists of a sine wave oscillator and power amplifier to drive the primary, a de- coder which determines the ratio of the difference between the lvdt secondary voltages divided by their sum, a filter and an output amplifier. the oscillator comprises a multivibrator which produces a triwave output. the triwave drives a sine shaper, which pro- duces a low distortion sine wave whose frequency is determined by a single capacitor. output frequency can range from 20 hz to 20 khz and amplitude from 2 v rms to 24 v rms. total har- monic distortion is typically C50 db. the output from the lvdt secondaries consists of a pair of sine waves whose amplitude difference, (v a Cv b ), is proportional to core position. previous lvdt conditioners synchronously detect this amplitude difference and convert its absolute value to ?0 0 20 60 100 140 ?0 ?00 ?40 ?60 ?20 ?0 ?0 0 40 temperature ? c gain and offset psrr ?ppm/volt offset psrr 12?5v offset psrr 15?8v gain psrr 12?5v gain psrr 15?8v figure 1. gain and offset psrr vs. temperature ?0 0 20 60 100 140 ?0 ?5 ?0 ?5 ?0 ?5 ?0 ? 0 5 temperature ? c gain and offset cmrr ?ppm/volt offset cmrr 3v gain cmrr 3v figure 3. gain and offset cmrr vs. temperature ?0 0 20 60 100 140 ?0 ?0 ?0 ?0 ?0 0 20 40 80 120 temperature ? c typical gain drift ?ppm/ c figure 2. typical gain drift vs. temperature ?0 0 20 60 100 140 ?0 ?0 ?0 0 10 20 temperature ? c typical offset drift ?ppm/ c figure 4. typical offset drift vs. temperature rev. a C4C AD598 rev. a C5C a voltage proportional to position. this technique uses the pri- mary excitation voltage as a phase reference to determine the polarity of the output voltage. there are a number of problems associated with this technique such as (1) producing a constant amplitude, constant frequency excitation signal, (2) c ompensating for lvdt primary to secondary phase shifts, and (3) compen- sating for these shifts as a function of temperature and fre quency. the AD598 eliminates all of these problems. the AD598 does not require a constant amplitude because it works on the ratio of the difference and sum of the lvdt output signals. a constant frequency signal is not necessary because the inputs are rectified and only the sine wave carrier magnitude is processed. there is no sensitivity to phase shift between the primary excitation and the lvdt outputs because synchronous detection is not em- ployed. the ratiometric principle upon which the AD598 oper- ates requires that the sum of the lvdt secondary voltages remains constant with lvdt stroke length. although lvdt manufacturers generally do not specify the relationship between v a +v b and stroke length, it is recognized that some lvdts do not meet this requirement. in these cases a nonlinearity will result. however, the majority of available lvdts do in fact meet these requirements. the AD598 utilizes a special decoder circuit. referring to the block diagram and figure 6 below, an implicit analog comput- ing loop is employed. after rectification, the a and b signals are multiplied by complementary duty cycle signals, d and (iCd) respectively. the difference of these processed signals is inte- grated and sampled by a comparator. it is the output of this comparator that defines the original duty cycle, d, which is fed back to the multipliers. as shown in figure 6, the input to the integrator is [(a+b)d]b. since the integrator input is forced to 0, the duty cycle d = b/(a+b). the output comparator which produces d = b/(a+b) also con- trols an output amplifier driven by a reference current. duty cycle signals d and (1Cd) perform separate modulations on the reference current as shown in figure 6, which are summed. the summed current, which is the output current, is i ref (1C2d). since d = b/(a+b), by substitution the output current equals i ref (aCb)/(a+b). this output current is then filtered and converted to a voltage since it is forced to flow through the scal- ing resistor r2 such that: v out = i ref ( a b )/( a + b ) r 2 connecting the AD598 the AD598 can easily be connected for dual or single supply operation as shown in figures 7 and 12 . the following general design procedures demonstrate how external component values are selected and can be used for any lvdt which meets AD598 input/output criteria. parameters which are set with external passive components in- clude: excitation frequency and amplitude, AD598 system bandwidth, and the scale factor (v/inch). additionally, there are optional features, offset null adjustment, filtering, and signal in- tegration which can be used by adding external components. comp comp filt filt ? comp ? rto offset filt ? integ v to i bandgap reference input input 1 1 a d b 0 AD598 rev. a C7C 8. c2, c3 and c4 are a function of the desired bandwidth of the AD598 position measurement subsystem. they should be nominally equal values. c 2 = c 3 = c 4 = 10 C4 farad hz/f subsystem (hz) if the desired system bandwidth is 250 hz, then c 2 = c 3 = c 4 = 10 C4 farad hz/ 250 hz = 0.4 m f see figures 13, 14 and 15 for more information about AD598 bandwidth and phase characterization. 9. in order to compute r2, which sets the AD598 gain or full- scale output range, several pieces of information are needed: a. lvdt sensitivity, s b. full-scale core displacement, d c. ratio of manufacturer recommended primary drive level, v pri to (v a + v b ) computed in step 4. lvdt sensitivity is listed in the lvdt manufacturers cata- log and has units of millivolts output per volts input per inch displacement. the e100 has a sensitivity of 2.4 mv/v/mil. in the event that lvdt sensitivity is not given by the manu- facturer, it can be computed. see section on determining lvdt sensitivity. for a full-scale displacement of d inches, voltage out of the AD598 is computed as v out = s v pri ( v a + v b ) ? ? 500 m a r 2 d . v out is measured with respect to the signal reference, pin 17 shown in figure 7. solving for r2, r 2 = v out ( v a + v b ) s v pri 500 m a d (1) note that v pri is the same signal level used in step 4 to determine (v a + v b ). for v out = 20 v full-scale range ( 10 v) and d = 0.2 inch full-scale displacement ( 0.1 inch), r 2 = 20 v 2. 70 v 2. 4 3 500 m a 0. 2 = 75. 3 k w v out as a function of displacement for the above example is shown in figure 9. + 10 + 0.1 d 0.1 10 v out ( volts) (inches) figure 9. v out ( 10 v full scale) vs. core displacement ( 0.1 inch) 10. selections of r3 and r4 permit a positive or negative output voltage offset adjustment. v os = 1. 2 v r 2 1 r 3 + 5 k w * 1 r 4 + 5 k w * ? ? ? ? (2) *these values have a 20% tolerance. for no offset adjustment r3 and r4 should be open circuit. to design a circuit producing a 0 v to +10 v output for a displacement of 0.1 inch, set v out to +10 v, d = 0.2 inch and solve equation (1) for r2. r 2 = 37.6 k w this will produce a response shown in figure 10. + 5 + 0.1 d 0.1 5 (inches) v out ( volts) figure 10. v out ( 5 v full scale) vs. core displacement ( 0.1 inch) in equation (2) set v os = 5 v and solve for r3 and r4. since a positive offset is desired, let r4 be open circuit. rearranging equation (2) and solving for r3 r 3 = 1. 2 r 2 v os 5 k w= 4. 02 k w figure 11 shows the desired response. + 10 0.1 + 0.1 d + 5 (inches) v out ( volts) figure 11. v out (0 vC10 v full scale) vs. displacement ( 0.1 inch) design procedure single supply operation figure 12 shows the single supply connection method. for single supply operation, repeat steps 1 through 10 of the design procedure for dual supply operation, then complete the additional steps 11 through 14 below. r5, r6 and c5 are addi- tional component values to be determined. v out is measured with respect to signal reference. 11. compute a maximum value of r5 and r6 based upon the relationship r 5 + r 6 v ps /100 m a 12. the voltage drop across r5 must be greater than 2 + 10 k w * 1. 2 v r 4 + 5 k w + 250 m a + v out 4 r 2 ? ? ? ? volts therefore r5 3 2 + 10 k w * 1. 2 v r4 + 5k w + 250 m a + v out 4 r2 ? ? ? ? 100 m a ohms *these values have 20% tolerance. based upon the constraints of r5 + r6 (step 11) and r5 (step 12), select an interim value of r6. AD598 rev. a C8C 13. load current through r l returns to the junction of r5 and r6, and flows back to v ps . under maximum load condi- tions, make sure the voltage drop across r5 is met as defined in step 12. as a final check on the power supply voltages, verify that the peak values of v a and v b are at least 2.5 volts less than the voltages at +v s and Cv s . 14. c5 is a bypass capacitor in the range of 0.1 m f to 1 m f. exc 1 exc 2 lev 1 lev 2 freq 1 freq 2 b1 filt b2 filt offset 1 offset 2 sig ref sig out feedback out filt a1 filt a2 filt r1 c2 AD598 c3 r2 c4 lvdt schaevitz e100 r3 r4 0.1 m f 6.8 m f signal reference 30v + ? s r l v out +v s 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 17 18 19 20 r5 r6 c5 c1 15nf 33k v b v b v a v a v ps figure 12. interconnection diagram for single supply operation gain phase characteristics to use an lvdt in a closed loop mechanical servo application, it is necessary to know the dynamic characteristics of the trans- ducer and interface elements. the transducer itself is very quick to respond once the core is moved. the dynamics arise prima- rily from the interface electronics. figures 13, 14 and 15 show the frequency response of the AD598 lvdt signal condi- tioner. note that figures 14 and 15 are basically the same; the difference is frequency range covered. figure 14 shows a wider range of mechanical input frequencies at the expense of accu- racy. figure 15 shows a more limited frequency range with en- hanced accuracy. the figures are transfer functions with the input to be considered as a sinusoidally varying mechanical posi- tion and the output as the voltage from the AD598; the units of the transfer function are volts per inch. the value of c2, c3 and c4, from figure 7, are all equal and designated as a parameter in the figures. the response is approximately that of two real poles. however, there is appreciable excess phase at higher fre- quencies. an additional pole of filtering can be introduced with a shunt capacitor across r2, (see figure 7); this will also in- crease phase lag. when selecting values of c2, c3 and c4 to set the bandwidth of the system, a trade-off is involved. there is ripple on the dc position output voltage, and the magnitude is determined by the filter capacitors. generally, smaller capacitors will give higher system bandwidth and larger ripple. figures 16 and 17 show the magnitude of ripple as a function of c2, c3 and c4, again all equal in value. note also a shunt capacitor across r2 shown as a parameter (see figure 7). the value of r2 used was 81 k w with a schaevitz e100 lvdt. figure 13. gain and phase characteristics vs. frequency (0 khzC10 khz) figure 14. gain and phase characteristics vs. frequency (0 khzC50 khz) AD598 rev. a C9C figure 15. gain and phase characteristics vs. frequency (0 khzC10 khz) 1000 100 10 1 0.1 0.01 0.1 1 10 c2, c3, c4; c2 = c3 = c4 ? m f ripple ?mv rms 2.5khz, c shunt = 0nf 2.5khz, c shunt = 1nf 2.5khz, c shunt =10nf figure 16. output voltage ripple vs. filter capacitance 1000 100 10 1 0.1 0.001 0.01 0.1 110 c2, c3, c4; c2 = c3 = c4 ? m f ripple ?mv rms 10khz , c shunt = 0nf 10khz , c shunt = 1nf 10khz , c shunt = 10nf figure 17. output voltage ripple vs. filter capacitance determining lvdt sensitivity lvdt sensitivity can be determined by measuring the lvdt secondary voltages as a function of primary drive and core posi- tion, and performing a simple computation. energize the lvdt at its recommended primary drive level, v pri (3 v rms for the e100). set the core to midpoint where v a = v b . set the core displacement to its mechanical full-scale position and measure secondary voltages v a and v b . sensitivity = v a ( at full scale ) v b ( at full scale ) v pri d from figure 18, sensitivity = 1.71 0.99 3 100 mils = 2. 4 mv / v / mil d = ?00 mils d = 0 a v v b 1.71v rms 0.99v rms 100 mils + d = v sec when v pri = 3v rms figure 18. lvdt secondary voltage vs. core displacement thermal shutdown and loading considerations the AD598 is protected by a thermal overload circuit. if the die temperature reaches 165 c, the sine wave excitation amplitude gradually reduces, thereby lowering the internal power dissipa- tion and temperature. due to the ratiometric operation of the decoder circuit, only small errors result from the reduction of the excitation ampli- tude. under these conditions the signal-processing section of the AD598 continues to meet its output specifications. the thermal load depends upon the voltage and current deliv- ered to the load as well as the power supply potentials. an lvdt primary will present an inductive load to the sine wave excitation. the phase angle between the excitation voltage and current must also be considered, further complicating thermal calculations. proving ring-weigh scale figure 20 shows an elastic member (steel proving ring) com- bined with an lvdt to provide a means of measuring very small loads. figure 19 shows the electrical circuit details. the advantage of using a proving ring in combination with an lvdt is that no friction is involved between the core and the coils of the lvdt. this means that weights can be measured without confusion from frictional forces. this is especially im- portant for very low full-scale weight applications. exc 1 exc 2 lev 1 lev 2 freq 1 freq 2 b1 filt b2 filt offset 1 offset 2 sig ref sig out feedback out filt a1 filt a2 filt AD598 c3 c4 schaevitz hr050 lvdt 6.8 m f 0.1 m f 0.1 m f 6.8 m f ?5v signal reference 15v + ? s r l v out +v s 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 17 18 19 20 1 m f 634k 10k 0.33 m f 0.1 m f c2 0.1 m f c1 0.015 m f v a v a v b v b figure 19. proving ring-weigh scale circuit force/load proving ring lvdt core figure 20. proving ring-weigh scale cross section although it is recognized that this type of measurement system may best be applied to weigh very small weights, this circuit was designed to give a full-scale output of 10 v for a 500 lb weight, using a morehouse instruments model 5bt proving ring. the lvdt is a schaevitz type hr050 ( 50 mil full scale). although this lvdt provides 50 mil full scale, the value of r2 was cal- culated for d = 30 mil and v out equal to 10 v as in step 9 of the design procedures. the 1 m f capacitor provides extra filtering, which reduces noise induced by mechanical vibrations. the other circuit values were calculated in the usual manner using the design procedures. this weigh-scale can be designed to measure tare weight simply by putting in an offset voltage by selecting either r3 or r4 (as shown in figures 7 and 12). tare weight is the weight of a con- tainer that is deducted from the gross weight to obtain the net weight. the value of r3 or r4 can be calculated using one of two sepa- rate methods. first, a potentiometer may be connected between pins 18 and 19 of the AD598, with the wiper connected to Cv supply . this gives a small offset of either polarity; and the value can be calculated using step 10 of the design procedures. for a large offset in one direction, replace either r3 or r4 with a potentiometer with its wiper connected to Cv supply . the resolution of this weigh-scale was checked by placing a 100 gram weight on the scale and observing the AD598 output sig- nal deflection on an oscilloscope. the deflection was 4.8 mv. the smallest signal deflection which could be measured on the oscilloscope was 450 m v which corresponds to a 10 gram weight. this 450 m v signal corresponds to an lvdt displace- ment of 1.32 microinches which is equivalent to one tenth of the wave length of blue light. the proving ring used in this circuit has a temperature coeffi- cient of 250 ppm/ c due to youngs modulus of steel. by put- ting a resistor with a temperature coefficient in place of r2 it is possible to temperature compensate the weigh-scale. since the steel of the proving ring gets softer at higher temperatures, the deflection for a given force is larger, so a resistor with a negative temperature coefficient is required. synchronous operation of multiple lvdts in many applications, such as multiple gaging measurement, a large number of lvdts are used in close physical proximity. if these lvdts are operated at similar carrier frequencies, stray magnetic coupling could cause beat notes to be generated. the resulting beat notes would interfere with the accuracy of mea- surements made under these conditions. to avoid this situation all the lvdts are operated synchronously. the circuit shown in figure 21 has one master oscillator and any number of slaves. the master AD598 oscillator has its fre- quency and amplitude programmed in the usual manner via r1 and c2 using steps 6 and 7 in the design procedures. the slave AD598s all have pins 6 and 7 connected together to disable their internal oscillators. pins 4 and 5 of each slave are con- nected to pins 2 and 3 of the master via 15 k w resistors, thus setting the amplitudes of the slaves equal to the amplitude of the master. if a different amplitude is required the 15 k w resistor values should be changed. note that the amplitude scales lin- early with the resistor value. the 15 k w value was selected be- cause it matches the nominal value of resistors internal to the circuit. tolerances of 20% between the slave amplitudes arise due to differing internal resistors values, but this does not affect the operation of the circuit. note that each lvdt primary is driven from its own power am- plifier and thus the thermal load is shared between the AD598s. there is virtually no limit on the number of slaves in this circuit, since each slave presents a 30 k w load to the master AD598 power amplifier. for a very large number of slaves (say 100 or more) one may need to consider the maximum output current drawn from the master AD598 power amplifier. rev. a C10C AD598Capplications AD598 rev. a C11C exc 1 exc 2 lev 1 lev 2 freq 1 freq 2 b1 filt b2 filt offset 1 offset 2 sig ref sig out feedback out filt a1 filt a2 filt AD598 ? s +v s 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 17 18 19 20 v b v a v + v 0.015 m f 0.1 m f 15k 15k 82.5k w 0.33 m f 0.1 m f schaevitz e 100 mechanical position input exc 1 exc 2 lev 1 lev 2 freq 1 freq 2 b1 filt b2 filt offset 1 offset 2 sig ref sig out feedback out filt a1 filt a2 filt AD598 ? s +v s 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 17 18 19 20 v b v a v + v schaevitz e 100 mechanical position input 0.1 m f 82.5k w 0.33 m f 0.1 m f 15k 15k exc 1 exc 2 lev 1 lev 2 freq 1 freq 2 b1 filt b2 filt offset 1 offset 2 sig ref sig out feedback out filt a1 filt a2 filt AD598 ? s +v s 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 17 18 19 20 v b v a v + v schaevitz e 100 mechanical position input 0.1 m f 82.5k w 0.33 m f 0.1 m f master slave 1 slave 2 lvdt lvdt lvdt figure 21. multiple lvdtssynchronous operation high resolution position-to-frequency circuit in the circuit shown in figure 22, the AD598 is combined with an ad652 voltage-to-frequency (v/f) converter to produce an effective, simple data converter which can make high resolution measurements. this circuit transfers the signal from the lvdt to the v/f con- verter in the form of a current, thus eliminating the errors nor- mally caused by the offset voltage of the v/f converter. the v/f converter offset voltage is normally the largest source of error in such circuits. the analog input signal to the ad652 is converted to digital frequency output pulses which can be counted by simple digital means. this circuit is particularly useful if there is a large degree of mechanical vibration (hum) on the position to be measured. the hum may be completely rejected by counting the digital fre- quency pulses over a gate time (fixed period) equal to a multiple of the hum period. for the effects of the hum to be completely rejected, the hum must be a periodic signal. exc 1 exc 2 lev 1 lev 2 freq 1 freq 2 b1 filt b2 filt offset 1 offset 2 sig ref sig out feedback out filt a1 filt a2 filt AD598 ? s +v s 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 17 18 19 20 v b v a 0.015 m f 0.1 m f 0.33 m f 0.1 m f schaevitz e 100 mechanical position input vs 0.1 m f gnd 0.1 m f + vs 1 2 3 4 5 6 7 8 15 14 13 12 11 9 10 16 +v s 2.5k +v s freq out 500khz ck 0.02 m f ad652 synchronous voltage to frequency converter +v s trim trim op amp out op amp op amp ? 10 volt input ? s c os clock input freq out digital gnd analog gnd comp comp? comp ref lvdt figure 22. high resolution position-to-frequency converter AD598 rev. a C12C signal is summed with the signal from the output position lvdt; this summed signal is integrated such that the output position is now equal to the input position. this circuit is an efficient means of implementing a mechanical servo-loop since only three ics are required. this circuit is similar to the previous circuit (figure 23) with one exception: the previous circuit uses a potentiometer instead of an lvdt to provide the input position signal. replacing the potentiometer with an lvdt offers two advantages. first, the increased reliability and robustness of the lvdt can be ex- ploited in applications where the position input sensor is located in a hostile environment. second, the mechanical motions of the input and output lvdts are guaranteed to be identical to within the matching of their individual scale factors. these particular advantages make this circuit ideal for application as a hydraulic actuator controller. differential gaging lvdts are commonly used in gaging systems. two lvdts can be used to measure the thickness or taper of an object. to measure thickness, the lvdts are placed on either side of the object to be measured. the lvdts are positioned such that there is a known maximum distance between them in the fully retracted position. this circuit is both simple and inexpensive. it has the advantage that two lvdts may be driven from one AD598, but the disad- vantage is that the scale factor of each lvdt may not match exactly. this causes the workpiece thickness measurement to vary depending upon its absolute position in the differential gage head. this circuit was designed to produce a 10 v signal output swing, composed of the sum of the two independent 5 v swings from each lvdt. the output voltage swing is set with an 80.9 k w resistor. the output voltage v out for this circuit is given by: v out = ( v a v b ) ( v a + v b ) + ( v c v d ) ( v c + v d ) ? ? 500 m a r 2. the v/f converter is currently set up for unipolar operation. the ad652 data sheet explains how to set up for bipolar opera- tion. note that when the lvdt core is centered, the output fre- quency is zero. when the lvdt core is positioned off center, and to one side, the frequency increases to a full-scale value. to introduce bipolar operation to this circuit, an offset must be introduced at the lvdt as shown in step 10 of the design procedures. low cost set-point controller a low cost set-point controller can be implemented with the cir- cuit shown in figure 23. such a circuit could possibly be used in automobile fuel control systems. the potentiometer, p1, is attached to the gas pedal, and the lvdt is attached to the but- terfly valve of the fuel injection system or carburetor. the posi- tion of the butterfly valve is electronically controlled by the position of the gas pedal, without mechanical linkage. this circuit is a simple two ic closed loop servo-controller. it is simple because the lvdt circuit is functioning as the loop inte- grator. by putting a capacitor in the feedback path (normally oc- cupied by r2), the output signal from the AD598 corresponds to the time integral of the position being measured by the lvdt. the lvdt position signal is summed with the offset signal introduced by the potentiometer, p1. since this sum is in- tegrated, it must be forced to zero. thus the lvdt position is forced to follow the value of the input potentiometer, p1. the output signal from the AD598 drives the lm675 power ampli- fier, which in turn drives the solenoid. this circuit has dual advantages of being both low cost and high accuracy. the high accuracy results from avoiding the offset er- rors normally associated with converting the lvdt signal to a voltage and then subsequently integrating that voltage. mechanical follower servo-loop figure 24 shows how two schaevitz e100 lvdts may be com- bined with two AD598s in a mechanical follower servo-loop configuration. one of the lvdts provides the mechanical input position signal, while the other lvdt mimics the motion. the signal from the input position circuit is fed to the output as a current so that voltage offset errors are avoided. this current exc 1 exc 2 lev 1 lev 2 freq 1 freq 2 b1 filt b2 filt offset 1 offset 2 sig ref sig out feedback out filt a1 filt a2 filt AD598 0.1 m f ? s +v s 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 17 18 19 20 v b v a + v 0.015 m f 0.1 m f 0.1 m f 0.33 m f 0.01 m f 1 m f 30k 50k w input pi input mechanical position output position schaevitz e 100 lvdt 100 w 10k 0.33 m f 1000pf 150k 0.1 m f + v mass on spring 620 n/m 33 grams 0.068 m f 49.9k 4.99k 20k 47 m f 47 m f 33 m f + 25v gnd power supply + v lm675 in4740a 10v guardian solenoid 12 vdc 2?nt?2d 62 cone figure 23. low cost set-point controller AD598 rev. a C13C exc 1 exc 2 lev 1 lev 2 freq 1 freq 2 b1 filt b2 filt offset 1 offset 2 sig ref sig out feedback out filt a1 filt a2 filt AD598 0.1 m f ? s +v s 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 17 18 19 20 v b v a + v 0.015 m f 0.1 m f 0.1 m f 0.33 m f 0.01 m f 1 m f 30k output mechanical position schaevitz e 100 lvdt 100 w 10k 0.33 m f 1000pf 150k 0.1 m f + v mass on spring 620 n/m 33 grams 0.068 m f 49.9k 4.99k 20k 47 m f 47 m f 33 m f + 25v gnd power supply + v lm675 exc 1 exc 2 lev 1 lev 2 freq 1 freq 2 b1 filt b2 filt offset 1 offset 2 sig ref sig out feedback out filt a1 filt a2 filt AD598 0.1 m f ? s +v s 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 17 18 19 20 v b v a + v 0.015 m f 0.1 m f 0.1 m f 0.33 m f input mechanical position schaevitz e 100 lvdt 4.99k in4740a 10v guardian solenoid 12 vdc 2-int-12d 62 cone figure 24. mechanical follower servo-loop exc 1 exc 2 lev 1 lev 2 freq 1 freq 2 b1 filt b2 filt offset 1 offset 2 sig ref sig out feedback out filt a1 filt a2 filt AD598 ? s +v s 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 17 18 19 20 v b v a 0.015 m f 0.1 m f 0.33 m f 0.1 m f v 0.1 m f 0.1 m f + v r2 80.9k w a b lvdt 1 c d lvdt 2 schaevitz e 100 v out = (v a ? b )+(v c ? d ) (v a +v b )+(v c +v d ) ?500 m a ?r2 schaevitz e 100 v out 10v full scale figure 25. differential gaging AD598 rev. a C14C precision differential gaging the circuit shown in figure 26 is functionally similar to the dif- ferential gaging circuit shown in figure 25. in contrast to figure 25, it provides a means of independently adjusting the scale fac- tor of each lvdt so that both scale factors may be matched. the two lvdts are driven in a master-slave arrangement where the output signal from the slave lvdt is summed with the output signal from the master lvdt. the scale factor of the slave lvdt only is adjusted with r1 and r2. the summed scale factor of the master lvdt and the slave lvdt is ad- justed with r3. r1 and r2 are chosen to be 80.9 k w resistors to give a 10 v full-scale output signal for a single schaevitz e100 lvdt. r3 is chosen to be 40.2 k w to give a 10 v output signal when the two e100 lvdt output signals are summed. the output volt- age for this circuit is given by: v out = ( v a v b ) ( v a + v b ) + ( v c v d ) ( v c + v d ) r 2 r 1 ? ? 500 m a r 3. exc 1 exc 2 lev 1 lev 2 freq 1 freq 2 b1 filt b2 filt offset 1 offset 2 sig ref sig out feedback out filt a1 filt a2 filt AD598 ? s +v s 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 17 18 19 20 v b v a 0.1 m f 0.33 m f 0.1 m f v 0.1 m f 0.1 m f + v a b c d schaevitz e 100 exc 1 exc 2 lev 1 lev 2 freq 1 freq 2 b1 filt b2 filt offset 1 offset 2 sig ref sig out feedback out filt a1 filt a2 filt AD598 ? s +v s 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 17 18 19 20 v b v a 0.015 m f 0.1 m f 0.33 m f 0.1 m f v 0.1 m f 0.1 m f + v r3 40.2k w slave lvdt master lvdt 15k w 15k w r2 80.9k w r1 80.9k w v out = v a ? b v a +v b + v c ? d v c +v d r2 r1 500 m a r3 v out 10v full scale figure 26. precision differential gaging AD598 rev. a C15C operation with a half-bridge transducer although the AD598 is not intended for use with a half-bridge type transducer, it may be made to function with degraded performance. a half-bridge type transducer is a popular transducer. it works in a similar manner to the lvdt in that two coils are wound around a moveable core and the inductance of each coil is a function of core position. in the circuit shown in figure 27 the v a and v b input voltages are developed as two resistive-inductor dividers. if the inductors are equal (i.e., the core is centered), the v a and v b input volt- ages to the AD598 are equal and the output voltage v out is zero. when the core is positioned off center, the inductors are unequal and an output voltage v out is developed. the linearity of this circuit is dependent upon the value of the resistors in the resistive-inductor dividers. the optimum value may be transducer dependent and therefore must be selected by trial and error. the 300 w resistors in this circuit optimize the nonlinearity of the transfer function to within several tenths of 1%. this circuit uses a sangamo agh1 half-bridge transducer. the 1 m f capacitor blocks the dc offset of the excitation output signal. the 4 nf capacitor sets the transducer excitation fre- quency to 10 khz as recommended by the manufacturer. alternate half-bridge transducer circuit this circuit suffers from similar accuracy problems to those mentioned in the previous circuit description. in this circuit the v a input signal to the AD598 really and truly is a linear function of core position, and the input signal v b , is one half of the exci- tation voltage level. however, a nonlinearity is introduced by the aCb/a+b transfer function. the 500 w resistors in this circuit are chosen to minimize errors caused by dc bias currents from the v a and v b inputs. note that in the previous circuit these bias currents see very low resistance paths to ground through the coils. exc 1 exc 2 lev 1 lev 2 freq 1 freq 2 b1 filt b2 filt offset 1 offset 2 sig ref sig out feedback out filt a1 filt a2 filt AD598 ? s +v s 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 17 18 19 20 v b v a 0.1 m f 0.33 m f 0.1 m f v 0.1 m f 0.1 m f + v 82.5k w 5k w 4nf sangamo aghi half-bridge 1 m f1 m f 300 w 300 w mechanical position input v out 10v full scale figure 27. half-bridge operation exc 1 exc 2 lev 1 lev 2 freq 1 freq 2 b1 filt b2 filt offset 1 offset 2 sig ref sig out feedback out filt a1 filt a2 filt AD598 ? s +v s 1 2 3 4 5 6 7 8 9 10 11 12 13 14 16 15 17 18 19 20 v b v a 0.1 m f 0.33 m f 0.1 m f v 0.1 m f 0.1 m f + v 143k w 1.87k w 4nf sangamo aghi half-bridge 1 m f 500 w 500 w mechanical position input v out 10v full scale figure 28. alternate half-bridge circuit AD598 rev. a C16C outline dimensions dimensions shown in inches and (mm). 20-pin sized brazed ceramic dip 20-lead wide body plastic soic (r) package printed in u.s.a. c1330C10C10/89 |
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